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Selected Publications (all relevant copyrights apply)

Google Scholar Page

 

Yuxi Liu, Rong Ye, Feng Yuan, Rakesh Kumar, and Qiang Xu. " On Logic Synthesis for Timing Speculation. ". In the IEEE/ACM 2012 International Conference on Computer-Aided Design, ICCAD, San Jose, November 2012. (PDF).

 

John Sartori and Rakesh Kumar. " Branch and Data Herding: Reducing Control and Memory Divergence for Error-tolerant GPU Applications. ". In the IEEE Transactions on Multimedia, TMM, 2012. (PDF).

 

Joseph Sloan, Rakesh Kumar, and Greg Bronevetsky. " Algorithmic Approaches to Low Overhead Fault Detection for Sparse Linear Algebra. ". In the 42nd IEEE/IFIP International Conference on Dependable Systems and Networks, DSN, Boston, June 2012. (PDF).

 

John Sartori and Rakesh Kumar. " Compiling for Energy Efficiency on Timing Speculative Processors. ". In the 49th Design and Automation Conference. DAC, San Francisco, June 2012. (PDF).

 

Joseph Sloan, John Sartori, and Rakesh Kumar. " On Software Design for Stochastic Processors. ". In the 49th Design and Automation Conference. DAC, San Francisco, June 2012. (PDF). (invited)

 

John Sartori, Ben Ahrens, and Rakesh Kumar. " Power-Balanced Pipelines. ". In the 18th International Symposium in High-Performance Computer Architecture. HPCA, Louisiana, February 2012. (PDF). (Nominated for Best Paper Award)

 

John Sartori, Joseph Sloan, and Rakesh Kumar. " Stochastic Computing: Embracing Errors in Architecture and Design of Processors and Applications. ". In the International Conference on Compilers, Architecture, and Synthesis of Embedded Systems. CASES, Tapie, October 2011. (PDF). (invited).

 

John Sartori and Rakesh Kumar. " Architecting Processors to Allow Voltage/Reliability Tradeoffs. ". In the International Conference on Compilers, Architecture, and Synthesis of Embedded Systems. CASES, Tapie, October 2011. (PDF). (Best Paper Award).

 

Joseph Sloan, Rakesh Kumar, Greg Bronevetsky, and Tzanio Kolev. " Algorithmic Techniques for Fault Detection for Sparse Linear Algebra". In the SRC TECHCON Conference 2011. TECHCON, Austin, September 2011. (PDF) (Best Paper in Session Award).

 

Tuck Boon-Chan, John Sartori, Puneet Gupta, and Rakesh Kumar. " On the Efficacy of NBTI Mitigation Techniques;. In Design, Automation, and Test in Europe. DATE, Grenoble, March 2011. (PDF).

 

Junli Gu, Steve Lumetta, Rakesh Kumar, and Yih Sun. " MOPED: Orchestrating Interprocess Message Data on CMPs;. In The 17th IEEE International Symposium on High Performance Computer Architecture. HPCA, San Antonio, February 2011. (PDF).

 

Rakesh Kumar, Tim Mattson, Gilles Pokam, Rob Van Der Wijngaart. " The Case for Message-Passing on Many-Core Chips;. In "Multiprocesor System-on-Chip: Hardware Design and Tool Integration" edited by Jurgen Becker and Michael Hubner. Springer Verlag. December 2010. (link). (invited).

 

" Designing Chips Without Guarantees;. In The IEEE Design and Test of Computers. IEEE Design & Test October 2010. (PDF).

 

Nicolas Zea, John Sartori, Ben Ahrens, and Rakesh Kumar. " Optimal Power/Performance Pipelining for Error Resilient Processors;. In the 28th IEEE International Conference on Computer Design. ICCD, Amsterdam, October 2010. (PDF).

 

Joseph Sloan, David Kesler, Rakesh Kumar, and Ali Rahimi. " A Numerical Optimization-based Methodology for Application Robustification: Transforming Applications for Error Tolerance". In the 40th IEEE/IFIP International Conference on Dependable Systems and Networks, DSN, Chicago, July 2010. (PDF).

 

Andrew Kahng, Seokhyeong Kang, Rakesh Kumar, and John Sartori. " Recovery-driven Design: A Methodology for Power Minimization for Error Tolerant Processor Modules". In the 47th Design Automation Conference, DAC, Anaheim, June 2010. (PDF).

 

Naresh Shanbhag, Rami Abdallah, Rakesh Kumar, and Doug Jones. " Stochastic Computation". In the 47th Design Automation Conference, DAC, Anaheim, June 2010. (PDF) (invited).

 

John Sartori, Aashish Pant, Rakesh Kumar, and Puneet Gupta. " Variation-Aware Speed Binning of Multi-core Processors". In the 11th ACM/IEEE International Symposium on Quality Electronic Design, ISQED, San Jose, March 2010. (PDF).

 

Sriram Narayanan, John Sartori, Rakesh Kumar, and Doug Jones. " Scalable Stochastic Processors". In Design, Automation and Test in Europe, DATE, Dresden, March 2010. (PDF1,PDF2).

 

Andrew Kahng, Seokhyeong Kang, Rakesh Kumar, and John Sartori. " Designing Processors from the Ground Up to Allow Voltage/Reliability Tradeoffs". In the 16th IEEE International Symposium on High-Performance Computer Architecture, HPCA, Bangalore, January 2010. (PDF).

 

Andrew Kahng, Seokhyeong Kang, Rakesh Kumar, and John Sartori. " Slack Redistribution for Graceful Degradation Under Voltage Overscaling". In the 15th IEEE/SIGDA Asia and South Pacific Design and Automation conference, ASPDAC, Tapie, January 2010. (PDF).

 

Vasileios Kontorinis, Amirali Shayan, Rakesh Kumar, and Dean Tullsen. " Reducing Peak Power with a Table-Driven Adaptive Processor Core". In the 42nd Annual IEEE/ACM International Symposium on Microarchitecture, MICRO, New York City, December 2009. (PDF).

 

Joseph Sloan and Rakesh Kumar. " Towards Scalable Reliability Frameworks for Error Prone CMPs". In the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES, Grenoble, October 2009. (PDF).

 

John Sartori and Rakesh Kumar. "Distributed Peak Power Management for Many-core Architectures". Design, Automation, and Test in Europe, DATE, Nice, March 2009. (PDF1)(PDF2).

 

Sukhun Kang and Rakesh Kumar. "Magellan: A Framework for Fast Muti-core Design Space Exploration and Optimization Using Search and Machine Learning ". Design, Automation, and Test in Europe, DATE, Munich, March 2008. (PDF).

 

Jeff Brown, Rakesh Kumar, and Dean Tullsen. "Proximity-Aware Directory-based Coherence for Multi-core Processor Architectures ". 19th ACM Symposium on Parallelism in Algorithms and Architectures , SPAA, San Diego, June 2007 (PDF).

 

Rakesh Kumar and Dean Tullsen. The Architecture of Efficient Multi-core Processors: A Holistic Approach. Advances in Computers. Elseiver. Chapter 01, Vol 69, May 2007 (PDF).

 

David Sheldon, Rakesh Kumar, Frank Vahid, Dean Tullsen, and Roman Lysecky. "Conjoining Soft-Core FPGA Processors". International Conference on Computer-Aided Design, ICCAD, San Jose, November 2006 (PDF).

 

David Sheldon, Rakesh Kumar, Frank Vahid, Roman Lysecky, and Dean Tullsen. "Application-Specific Customization of Parameterized FPGA Soft-Core Processors". International Conference on Computer-Aided Design, ICCAD, San Jose, November 2006 (PDF).

 

 

 

Prior to September 2006

 

Rakesh Kumar. Holistic Design for Multi-core Architectures. PhD Thesis. University of California, San Diego. September 2006 (PDF)

 

 

Norman P. Jouppi, Rakesh Kumar, and Dean Tullsen. Introduction to the Special Issue on the 2006 Workshop on the

Design, Analysis, and Simulation of Chip Multiprocessors (dasCMP06)?. ACM SIGARCH Computer Architecture

News. March 2007.

 

Norman P. Jouppi, Rakesh Kumar, and Dean Tullsen. Introduction to the Special Issue on the 2005 Workshop on the

Design, Analysis, and Simulation of Chip Multiprocessors (dasCMP05)?. ACM SIGARCH Computer Architecture

News. December 2005.

 

Rakesh Kumar, Dean Tullsen, Norman Jouppi, and Partha Ranganathan. "Heterogeneous Chip Multiprocessors". In IEEE Computer, November 2005 (PDF).

 

Rakesh Kumar and D. Dutta Majumdar. "A multi-processing Database model for efficient storage and retrieval of Medical Images" In Journal of Computer Science & Informatics, Volume 30, No 3, page 31-38.

 

Rakesh Kumar, Dean Tullsen, and Norman Jouppi. Core Architecture Optimization for Heterogeneous Chip Multiprocessors". International Conference on Parallel Architectures and Compilation Techniques, PACT, Seattle, April 2006(PDF)

 

Matt Devuyst, Rakesh Kumar, Dean Tullsen. "Exploiting Unbalanced Thread Scheduling for Energy and Performance on a CMP of SMT Processors". International Parallel and Distributed Processing Symposium, IPDPS-2006, Rhodes Island, Greece, April 2006(PDF)

 

Rakesh Kumar, Victor Zyuban, Dean Tullsen. "Interconnections in multi-core architectures: Understanding Mechanisms, Overheads and Scaling". 32nd International Symposium on Computer Architecture, ISCA-32, Madison, Wisconsin, June 2005(PDF)

 

Rakesh Kumar, Norman Jouppi, Dean Tullsen. "Conjoined-core chip multiprocessing". 37th International Symposium on Microarchitecture, MICRO-37, Portland, Oregon, Dec., 2004 (PDF)

 

Eric Tune, Rakesh Kumar, Dean Tullsen, Brad Calder "Balanced Multithreading: Increasing Throughput via a Low Cost Multithreading Hierarchy" 37th International Symposium on Microarchitecture, MICRO-37, Portland, Oregon, Dec., 2004(PDF)

 

Rakesh Kumar, Dean Tullsen, Partha Ranganathan, Norman Jouppi, Keith Farkas. "Single-ISA Heterogeneous Multi-core Architectures for Multithreaded Workload Performance". In 31st International Symposium on Computer Architecture, ISCA-31, June 2004.(PDF)

 

Rakesh Kumar, Keith Farkas, Norman Jouppi, Partha Ranganathan and Dean Tullsen. "Single-ISA Heterogeneous Multi-Core Architectures: The Potential for Processor Power Reduction". In 36th International Symposium on Microarchitecture, MICRO-36, Dec. 2003.(PDF)

 

Rakesh Kumar and Dean Tullsen. "Compiling for Instruction Cache Performance on a Multitreaded Architecture". In the 35th Annual International Symposium on Microarchitecture, MICRO-35, November 2002.(PDF)

 

Rakesh Kumar, Keith Farkas, Norman Jouppi, Partha Ranganathan and Dean Tullsen. "A Multi-Core Approach to Addressing the Energy-Complexity Problem in Microprocessors". Workshop on Complexity-Effective Design, WCED03, June 2003.(PDF)

 

Yiannakis Sazeidis, Rakesh Kumar, Dean M. Tullsen and Theophanis Konstantinou. "The Danger of Interval-Based Power-Efficiency Metrics:When Worst is Best". Computer Architecture Letters, Volume 4, January 2005.(PDF)

 

Rakesh Kumar, Keith Farkas, Norman Jouppi, Partha Ranganathan and Dean Tullsen. "Processor Power Reduction Via Single-ISA Heterogeneous Multi-Core Architectures". Computer Architecture Letters, Volume 2, April 2003.(PDF)